Memory Read Operation

A small 8 × 8 memory (k = 3 address lines, n = 8 data lines), so every bit fits on screen. A 128M × 8 memory works the same way with 27 address bits.

Processor (CPU) CU · CONTROL UNIT MAR · 3 bits MDR · 8 bits R=0 W=0 En=0 ADDRESS LINES · one way → DATA LINES · two way ⇄ CONTROL LINES · R, W, En Memory · 8 × 8 address word decoder
Address (MAR → memory) Data (memory ⇄ MDR) Control (R, W, En, MFC)