Three ways to put many processors to work at once. Each section animates one design from the slides: an array processor, a multiprocessor and a multicomputer. Press Play in any section.
A single control unit broadcasts each instruction to every processor in an 8 × 8 grid. All 64 processors run it at the same moment, each on the data in its own local memory (SIMD: single instruction, multiple data).
idleEach cell shows a processor (top) and its local memory (bottom).
All CPUs share one bus to a shared memory. When more than one CPU requests the bus in the same cycle, only one is granted and the others wait: a bus conflict. CPUs communicate by writing and reading messages in shared memory.
Run (a) and then (b) to compare conflicts.
Standalone computers, each with its own CPU and memory, connected by a network. Nothing is shared, so they cooperate by passing messages to each other, like email. To the user, the whole network looks like one system.
PC1 splits the job, sends a range to each other computer, and adds up the replies.
| Array processor | Multiprocessor | Multicomputer | |
|---|---|---|---|
| Control | One control unit for all processors | Each CPU runs its own program | Each computer runs its own program and OS |
| Memory | Local memory per processor | Shared main memory (plus optional local memory) | Private memory only; nothing shared |
| Communication | Instruction broadcast from the control unit | Read and write messages in shared memory over the bus | Message passing over a network |
| Main bottleneck | Only helps when every processor does the same operation | Bus conflicts; needs an OS to coordinate bus use | Network delay; more hops mean slower messages |